1. Field of the Invention
The present invention relates to a shift register having a plurality of stages including of a plurality of cascaded shift circuits and a method for driving the shift register, as well as a display driving device comprising the shift register to drive a display panel.
2. Description of the Related Art
Amorphous silicon thin-film transistors TFT (referred to as “a-SiTFTs” below) and polysilicon thin-film transistors (referred to as “p-SiTFTs” below) are used as, for example, display driving elements constituting pixels in a liquid crystal display panel.
The liquid crystal display panel has a plurality of scan lines and a plurality of signal lines. The scan lines and signal lines are respectively driven by a scan driver and a signal driver to display desired images. Specifically, the scan driver sequentially applies, to each scan line, a scan signal that selects a-SiTFTs or p-SiTFTs constituting display elements. The signal driver applies a voltage corresponding to display data to a liquid crystal capacitance constituting the display elements, via each signal line. This allows a display operation to be performed to display an image on the liquid crystal display panel.
On the other hand, in recent years, studies have been made of the use of a-SiTFTs or p-SiTFTs for constructing various circuits. For example, the technique described below has been developed and studied to reduce module sizes and thus costs. A shift register circuit is formed of a-SiTFTs or p-SiTFTs and applied to a scan driver or signal driver for a display driving device. Thus, the display driving device is integrated with the liquid crystal display panel.
However, a-SiTFTs and p-SiTFTs are inferior, in operational characteristics, to monocrystal Si-based transistors conventionally used to construct the scan and signal drivers. It is thus difficult to construct a circuit that is operationally stable and that exhibits a sufficient performance, using a-SiTFTs or p-SiTFTs.
FIG. 9 shows an example of a circuit configuration of shift circuits constituting the respective stages of a shift registers. The shift register is constructed by connecting n shift circuits (n is an integer equal to or larger than 1) in series. In this case, it is assumed that the transistor constituting the shift circuit is composed of an N-type a-SiTFT or N-type p-SiTFT.
In FIG. 9, when an output signal output by the shift circuit in the preceding stage is applied to an input terminal IN and an input control signal φ is input at a predetermined time, TFT (thin film transistor or MOS transistor) 111 is turned on to raise the potential at a contact NA in accordance with the signal level of the input signal. This turns on TFT 112 and TFT 113 to lower the potential at a contact NB. TFT 114 is thus turned off. At this time, when the signal level of a clock signal supplied to an input terminal CK switches from low to high, a high-level output signal is output from an output terminal OUT. Then, an output signal output by the shift circuit in the succeeding stage is applied to a reset terminal RST as a reset signal. Then, TFT 115 is turned on to emit charges accumulated at the contact NA to a low-potential power source Vss. This changes the potential at the contact NA to the low level. This turns off TFT 112 and TFT 113 to raise the potential at the contact NB. TFT 114 is thus turned on to change the output signal to the low level in accordance with a signal level (low level Vss) supplied to a control terminal CTL.
In this case, the following two-stage circuit operation is performed after the output signal output by the shift circuit in the succeeding stage is applied to the reset terminal RST as a reset signal and before the MOS transistor TFT 114 is turned on to change the output signal to the low level: TFT 115 is turned on to change the potential at the contact NA to the low level, and then TFT 112 and TFT 113 are turned off to raise the potential at the contact NB. A-SiTFTs and p-SiTFTs have a significantly lower mobility than monocrystal Si-based transistors. Accordingly, TFTs operate more slowly than monocrystal Si-based transistors. Consequently, after the application of the reset signal, a long time is required to change the output signal to the low level. That is, a fall in the output signal is relatively delayed. Thus, with such a shift register using a plurality of shift circuits composed of a-SiTFTs or p-SiTFTs, the circuits must have an increased clock frequency. However, such an increase in clock frequency may delay the fall in the output signal from each shift circuit, thus making circuit operations unstable. This may lead to malfunctioning.